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Chaiwat Sakul


NAME   : Mr. Chaiwat Sakul
Position : Vice Dean for Academic and Research Affairs

Academic Positions : Assistant Professor 

Course  : Bachelor of Engineering (B.Eng.) Information and Communication Engineering Program

TEL : -

EMAIL : chaiwatsakul@gmail.com

 
Education
  • Doctor of Engineering (Ph.D) in Electrical Engineering, King Mongkut’s Institute of Technology Ladkrabang
  • Master of Engineering (M.Eng) in Electrical Engineering, King Mongkut’s Institute of Technology Ladkrabang
  • Bachelor of Engineering (B.Eng) in Electrical Engineering (Telecommunication Engineering) Program Mahanakorn University of Technology
 
Expertise
  • Analog circuit design and analysis
  • Telecommunication technology
 
Teaching Experience
  • 2018, Faculty of Engineering and Technology, RMUTSV-Trang campus
  • 2018 – 2009, Faculty of Science and Fisheries Technology, RMUTSV-Trang campus
  • 2008 – 2009, Faculty of Engineering, RMUTSV-Songkla
  • 2005 – 2009, Faculty of Engineering, Rajamangala Institute of Technology, Bangkok Technical campus.
  • 2004 – 2005, Faculty of Science and Information technology, Hadyai University
  • 2000 – 2004, Department of Electronics, Trang Technical Collage
 
Research Interests
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Research or Invention
   Research papers published nationally / internationally.
  • S. Boonri C. Sakul K. Dejhan and I. Chaisayun, “The Current and Voltage Mode Multiplier Circuit”, Ladkabang Engineering Journal, Vol. 17, No. 3, pp.10-13, September 2000.
  • C. Sakul S. Boonri K. Dejhan and I. Chaisayun, “The Simple Four-Quadrant Analog Multipler Circuits”, Ladkabang Engineering Journal, Vol. 17, No. 3, pp.18-21, September, 2000.
  • C. Sakul K. Dejhan and V. Saliee, “Low Voltage Squaring and Square-root Circuit”, Ladkabang Engineering Journal, Vol. 19, No. 1, pp.13-17, March 2002.
  • Chaiwat Sakul, “A Mixed mode Four-Quadrant Analog Multiplier Circuits”, Rajamangala University of Technology Krungthep Research Journal, Vol. 3, No. 1, pp. 11-15, January – June 2009.
  • Chaiwat Sakul, “Analog MOSFET vector summation circuit design”, The Journal of Industrial Technology, Vol. 7, No. 1, January – June 2011.
  • Chaiwat Sakul, “Design of CMOS Four-Quadrant Voltage Signal Multiplier Circuit Using Square Technique”, The Journal of Industrial Technology, Vol. 13, No. 2, May – August 2017.
  • Chaiwat Sakul, Winai Jaikla and Kobchai Dejhan, “New Resistorless Current-Mode Quadrature Oscillators Using 2 CCCDTAs and Grounded Capacitors”, Radioengineering, vol.20, no.4, pp.890-897, Desember 2011.
  • Chaiwat Sakul and Kobchai Dejhan, “FLIPPED VOLTAGE FOLLOWER ANALOG NONLINEAR CIRCUITS”, Journal of Circuits, Systems and Computers, vol.21, issue.3, 1250024 (15 pages), May2012.
   Research papers presented at national / international academic conferences.
  • T. Nion P. Viroate S. Chaiwat,“Low Voltage Power Supply-Four Quadrant CMOS Analog Multiplier Circuit”, 29th Electrical Engineering Conference, Vol. II, pp. 621-624, 9-10 November 2006.
  • S. Chaiwat P. Kajornsak, “±1.5 Voltage Power Supply CMOS Vector Summation Circuit Design”, 30th Electrical Engineering Conference, Vol. II, pp. 869-872, 25-26 October 2007.
  • Chaiwat Sakul, Kobchai Dejhan and Ittipong Chaisayun, “A Squaring Circuit with Rail to Rail Input range”, Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology International Conference (ECTI-CON 2006), pp.666-669, Thailand, May 2006.
  • Chaiwat Sakul, Somkiat Pianprantong, Kobchai Dejhan and Ittipong Chaisayun, “A Rail to Rail Squaring Circuit with Differential Input Rang”, International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2006), pp.405-408, Thailand, July 2006.
  • Chaiwat Sakul, Somkiat Pianprantong and Kobchai Dejhan, “A Versatile analog division circuit”, The 22nd International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2007), vol.2 pp.737-738, Busan, Korea, July 2007.
  • Chaiwat Sakul, “Input Voltage/Current CMOS Squaring Circuit”, The 22nd International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2007), vol.2 pp.741-742, Busan, Korea, July 2007.
  • Chaiwat Sakul and Ittipong Chaisayun, “A Single Low-voltage CMOS Analog Multiplier”,The 22nd  International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2007), vol.2 pp.745-746, Busan, Korea, July 2007.
  • Chaiwat Sakul, “A New CMOS Squaring Circuit Using Voltage/Current Input”, The 23rd International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2008, pp.525-528, Yamaguchi, Japan, July 2008.
  • Chaiwat Sakul, “A CMOS Square-Rooting Circuits”, The 23rd International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2008), pp.537-540, Yamaguchi, Japan, July 2008.
  • Chaiwat Sakul and Kajornsak Pongthana, “A LOW VOLTAGE SUPPLY FOUR-QUADRANT ANALOG MULTIPLIER CIRCUIT”, 2009 International Symposium on Intelligent Signal Processing and Communication Systems, Abstract TA2-C-5, Kanazawa, Japan, July 2009.
  • Surin Kanchana, Aekkarat Noppakarn, Chaiwat Sakul and Winai Jaikla, “Current Controlled Current-mode Universal Filter Using CCCCTAs.”, 2011 International Conference on Electrical Machines and Systems, PE-67, Beijing, Chaina, August 2011.
  • Chaiwat Sakul, “Building CMOS ECCCII with Linear Tune of Rx”, The 27th International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2012), Sapporo, Japan, July 2012.
  • Chaiwat Sakul and Kajornsak Pongthana, “Realization of CMOS Mixed-mode Square-rooting Circuit”, The 27th International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2012), Sapporo, Japan, July 2012.
  • Chaiwat Sakul, “Building CMOS ECCCII with Linear Tune of Rx”, The 27th International Technical Conference on Circuits and System, Computer and Communications (ITC-CSCC 2012), Sapporo, Japan, July 2012.
 
Book
  • Digital communication
  • Electronic Engineering
 
Experience
  • Vice Dean for Academic and Research
  • Head of Technology department

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